P. Fieguth - SD192 Homepage
Paul Fieguth
Dept. of Systems Design Engineering
Faculty of Engineering
University of Waterloo
Waterloo, Ontario
Canada N2L 3G1
pfieguth@uwaterloo.ca
Tel: (519) 888-4567 x84970
FAX: (519) 746-4791

SD192 Homepage

I'll be putting things here occasionally, although anything important will of course be announced in class.

Those of you interesting in using the PIC microcontrollers for Lab 8, the programming station is already in place in the lab. Tariq is willing to assist groups interested in this option. Also, there are two samples of source code and a couple of pieces of documentation at the very bottom of this page.

Lecture notes for Friday, July 16th.

Example from class: Here is the link to the example which I worked on in Monday's class: The problem statement from the exam. Final Exam: The final exam will be held on August 9th, 9:00-12:00. The exam will be in rooms E2-1303A and E2-1303B.

Lab Demos: Because Lab 8 ends up being fairly self-directed, we don't really have the same rigid notion of schedule as we did for earlier labs. Also, lab 8 is more ambitious, and so it is reasonable to give people extra time. Consequently:

Lab Kits: ***Note -- You will not get a course grade until you hand in your kit! Please get them in to Tariq or Derek as soon as possible! They don't do you any good for lab 8, so might as well return right away.


Overview Material

People:

Office Hours:

Related Links:

Some of you have asked what we'll be covering in the course, for the purposes of your resume or for workterm interviews. Here is a rough summary statement:

In this course you will learn the fundamentals of digital logic and circuits. We will learn state-machines / sequential logic, circuit implementation using PLAs and EPROMs, and a basic VHDL-like digital programming language for field-programmable gate arrays (FPGAs) from Altera.


Tutorials:

The following schedule is tentative; I will announce tutorials weekly in class.
   Wednesday, May   5, No tutorial
   Wednesday, May  12, Tutorial - Conversions between circuits, equations, TTs
   Wednesday, May  19, Tutorial - Boolean Algebra
   Wednesday, May  26, Tutorial - Lab 3, Binary counting, Misc questions
   Wednesday, Jun   2, Tutorial - Lab 4, K-Maps, Multiplexer Design
   Wednesday, Jun   9, Tutorial - Combinational Design (Kmaps, Decoders, Muxes)
   Wednesday, Jun  16, Tutorial - Lab 5, PLD Programming details (see files below
                                      under Lab-related information)
   Wednesday, Jun  23, Tutorial - Flip-flops
   Wednesday, Jun  30, Tutorial - Basic sequential design examples
   Wednesday, Jul   7, Tutorial - Lab 7, EPROM programming
   Wednesday, Jul  14, Tutorial - Make-up class for July long weekend
   Wednesday, Jul  21, Tutorial - Shift Reg., Counters, and ASM Charts
   Wednesday, Jul  28, Tutorial - Full ASM example

Course Reading (from Mano, 2nd/3rd Ed.):

All numbers refer to sections within respective chapters. You should read the material some time before or during the indicated week number.

Second Edition:
   Week  Chapter  Section(s)
    1       1     1-4, Skim 7-9 (Mainly responsible for Sect. 2, 3) 
    1       2     1-7, Skim 6, 8 
    2       4     1-4, 6 
    3       5     1, 2 (to p.157), 4, 5, 6 (to p.175) 
    3       3     1, 2, 3, 5, 6, 8 
    4       5     6 (from p.176), 7, 8 
    5       6     1-4 
    6       6     5-8, Skim 6 
    8       7     1-5, 7, Skim 6 
    9       8     1-2 
   10       8     3-6 

Third Edition:
   Week  Chapter  Section(s)
    1       1     1-4, Skim 7-9 (Mainly responsible for Sect. 2, 3) 
    1       2     1-7, Skim 6, 8 
    2       4     1-4
    3       4     7-10 (to p.144)
    3       3     1, 2, 4, 5, 6, Skim 8
    4       4     10 (from p.144)
    4       7     5, 6
    5       5     1-4 
    6       5     6, 7
    8       6     1-5
    9       7     1-3
    9       8     3, 4, Skim 1-2
   10       8     7, 9

Suggested Sample Problems (also from Mano, 2nd/3rd Ed.):

You don't need to hand in any solutions, however if you have difficulties with any of these problems you should talk to one of the TAs.

Note that many of the problems in the two editions are different.

Second Edition:
   Chap. 1:  3,  4, 11 
   Chap. 2:  1,  2,  3,  7, 10, 12, 13, 14, 17 
   Chap. 4:  1,  4, 11, 18 
   Chap. 5:  1, 13, 23 
   Chap. 3:  1,  2,  3,  4, 22 
   Chap. 5: 15, 16, 24, 25, 27, 28 
   Chap. 6:  4,  5,  6,  8,  9, 13, 18, 20, 21, 22 
   Chap. 7:  2,  3,  4,  5,  6,  8, 17, 19, 20, 24 
   Chap. 8:  3,  4, 10, 20, 22 

Third Edition:
   Chap. 1:  4,  7     
   Chap. 2:  1,  2,  3,  6, 10, 14, 16, 17, 20 
   Chap. 4:  2,  4,  6, 10, 21, 31
   Chap. 3:  1,  2,  3,  4, 15 
   Chap. 4: 27, 28, 32, 33, 34, 35 
   Chap. 5:  2,  4,  6,  7,  8, 11, 16, 17, 18, 19 
   Chap. 6:  2,  4,  7, 10, 14, 17, 20, 27, 28 
   Chap. 7:  1,  2
   Chap. 8:  3,  6, 10, 11, 20
2nd Edition solutions manual in the library: Call number UWD ????
3rd Edition solutions manual in the library: Call number UWD 1494

Solutions manuals are also available in the lab.


Last Year's Exams

Here are example Midterm and Final exams from a year or two ago. Both exams were prepared by me, and should be similar to what you could expect.


Lab Reports:

Starting last year, each group is required to keep a hardcover lab book (one book per group). Good engineering practice dictates keeping this kind of a proper laboratory book, and the department wants to encourage this practice in its lab courses.

ALL of your lab preparation work, sketches, figures, equations, lists of variable names, wiring diagrams etc. have to be drawn in the book. Do not do your work on scrap paper! The TAs will be looking for the following points:

A "formal" report is required after each lab, starting with lab 2. One report is required per group, not one per person.

The report is formal in the sense that it should be more like a work report (in style, not in length) than a couple of figures stapled together. I have prepared a Summary of Common Writing Errors and a Top Five List of Lab Advice, some which you may find useful. Your report should have

The report should be neat, but don't waste your time doing complicated truth tables with your word-processor. Hand-drawn diagrams, tables etc. are perfectly fine. The marks will be allocated something like

  In-Laboratory Component of Grade:
     10% In-lab demonstration of successful functionality
      5% Demonstration was on-time (ie, in your lab afternoon)
      5% Up-to-date and prepared laboratory book

  Post-Lab Report Component of Grade:
     20% Circuit diagrams, simulations, truth tables
     20% Circuit description, design process
     20% Overall document layout and organization
     20% Writing style, grammar
This distribution is approximate, and will vary from lab to lab. However it should give you a pretty good idea of what we'll be looking for. Specifically, I'm interested in seeing well-structured, well-written reports.


Lab-Related Files and Information

(The following is still being organized; none of this is important for Labs 1 or 2).

Your Lab TAs and Graders:

If you have questions about the grading of a lab, please first talk to the TA who graded it.

Lab 2
Lab 3
Lab 4
Lab 5
Lab 6
Lab 7
Lab 8
Howard
Nezam
Masoud
Insop
Nezam
Masoud
Howard


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